<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[RSS Feed]]></title><description><![CDATA[RSS Feed]]></description><link>http://direct.ecency.com</link><image><url>http://direct.ecency.com/logo512.png</url><title>RSS Feed</title><link>http://direct.ecency.com</link></image><generator>RSS for Node</generator><lastBuildDate>Fri, 01 May 2026 04:40:44 GMT</lastBuildDate><atom:link href="http://direct.ecency.com/created/freertos/rss.xml" rel="self" type="application/rss+xml"/><item><title><![CDATA[SiFive Learn Inventor is a Wireless RISC-V Development Kit Inspired by BBC Micro:bit]]></title><description><![CDATA[SiFive Learn Inventor is a RISC-V educational board partially inspired by BBC Micro:bit board with the same crocodile clip-friendly edge connector, and an LED matrix. The board is also fully qualified]]></description><link>http://direct.ecency.com/embedded/@cnxsoft/sifivelearninventorisawirelessrisc-vdevelopmentkitinspiredbybbcmicrobit-g3d8hgvy32</link><guid isPermaLink="true">http://direct.ecency.com/embedded/@cnxsoft/sifivelearninventorisawirelessrisc-vdevelopmentkitinspiredbybbcmicrobit-g3d8hgvy32</guid><category><![CDATA[embedded]]></category><dc:creator><![CDATA[cnxsoft]]></dc:creator><pubDate>Tue, 10 Dec 2019 22:05:03 GMT</pubDate><enclosure url="https://images.ecency.com/p/C3TZR1g81UNdGay3d1oA1oE4eTYs4RhCWtjPu7CBDabERbUvjC8NQxwnUUrgUfBeNHLSSdyQ2HAZiZS71ZeZH988RMgLfdSf1jU24a5TErxZ4Uz72NMHGPp?format=match&amp;mode=fit" length="0" type="false"/></item><item><title><![CDATA[FreeRTOS 的链表 vListInsertEnd() 方法笔记]]></title><description><![CDATA[在研究 FreeRTOS 内核时, 发现自已一直理解错了 vListInsertEnd() 的意思, 特此记录下. vListInsertEnd() 这个方法比较迷惑人, 这个方法真正的意思是尾插, 而不是插到链表的尾部. 这两者的意思是不一样的. 那究竟什么是尾插呢? 我们应该知道头插, 给定一个链表节点 A, 头插就是说新的节点要插在 A 的后面, 而尾插则是说新的节点要插在 A 的前面. 这就是尾插的意思:]]></description><link>http://direct.ecency.com/cn-programming/@cifer/freertos-vlistinsertend</link><guid isPermaLink="true">http://direct.ecency.com/cn-programming/@cifer/freertos-vlistinsertend</guid><category><![CDATA[cn-programming]]></category><dc:creator><![CDATA[cifer]]></dc:creator><pubDate>Thu, 16 Nov 2017 16:22:27 GMT</pubDate><enclosure url="https://images.ecency.com/p/hgjbks2vRxvgWiL9zvkhHfauHyQyHNhLKxzHqPNM42zpyJC3LsgkYgEPBETvUmR33dkX2MmsDrnSdwAWorMuH2gxoQ?format=match&amp;mode=fit" length="0" type="false"/></item></channel></rss>