<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[RSS Feed]]></title><description><![CDATA[RSS Feed]]></description><link>http://direct.ecency.com</link><image><url>http://direct.ecency.com/logo512.png</url><title>RSS Feed</title><link>http://direct.ecency.com</link></image><generator>RSS for Node</generator><lastBuildDate>Sun, 24 May 2026 23:05:01 GMT</lastBuildDate><atom:link href="http://direct.ecency.com/created/quartus/rss.xml" rel="self" type="application/rss+xml"/><item><title><![CDATA[Logic Design - Simple FPGA Design using Quartus in VHDL]]></title><description><![CDATA[    Hello its a me again Drifter Programming! Today we get back to Logic Design to talk about FPGA's and all the basic knowledge you need to get started! I will start off talking about]]></description><link>http://direct.ecency.com/fpga/@drifter1/logic-design-simple-fpga-design-using-quartus-in-vhdl</link><guid isPermaLink="true">http://direct.ecency.com/fpga/@drifter1/logic-design-simple-fpga-design-using-quartus-in-vhdl</guid><category><![CDATA[fpga]]></category><dc:creator><![CDATA[drifter1]]></dc:creator><pubDate>Mon, 18 Dec 2017 08:28:18 GMT</pubDate><enclosure url="https://i.ecency.com/p/5CEvyaAfMXebL91AmHNXQJGDUY69XCTUcvYAHTbJat67HyemTjrucboudEzut5WbcUiwphVEoRkuruVEN?format=match&amp;mode=fit" length="0" type="false"/></item></channel></rss>