Are CCD Memories Coming Back? - The Memory Guy Blog

Source: https://thememoryguy.com/are-ccd-memories-coming-back/

    The Memory Guy was recently contacted by a researcher at imec, the Belgian research consortium, about the rebirth of an old idea.  Back in the late 1970s and early 1980s semiconductor makers had considered using charge-coupled devices (CCDs) for computer main memories.   Probably few readers will even recognize either the name or the abbreviation.  The CCD memory was a good idea that was completely overshadowed by another good idea — DRAM — that ended up taking the market over.

Now that DRAM is having troubles shrinking much farther than its current size, and since DRAM doesn’t easily benefit from any existing 3D processes, the imec researchers decided to investigate ways to use the “Punch & Plug” process that has been so successful with 3D NAND flash (and which is shown in this post’s graphic, courtesy of imec) to make a CCD-based memory that can replace DRAM at a lower cost.
What is a CCD?
A CCD is an interesting device that functions something like a shift register, but with considerably less complexity. The less complex a memory is, the fewer transistors it takes to make it, and that means that it will be inexpensive. A good example is DRAM, with its simple memory cell made of one transistor and one capacitor, versus an SRAM that is made up of six transistors per bit. DRAM is significantly less expensive than SRAM as a result.
Although a CCD doesn’t need DRAM’s capacitor, it does store a charge in a semiconductor layer, but it takes at least three transistors per bit to implement. The three transistors move the charge through the semiconductor layer somewhat like an electric sign with lights that scroll from one side to the other.
Intel’s 1977 data sheet illustrates a 4-transistor mechanism in the figure below, but a much more intuitive animated presentation is made by a GIF on Wikipedia’s Charge-Coupled Device page.

In DRAM’s early days, the difference between the Intel CCD’s four transistors and DRAM’s single transistor and capacitor made a DRAM bit smaller than a CCD bit, and DRAM won the market by providing less expensive bits. But the capacitor didn’t easily shrink beyond a certain point, simply because of the minimum charge it needed to hold. Today the capacitor is the biggest part of a DRAM bit, and tiny vertical transistors that are made using the Punch & Plug process promise to shrink CCDs smaller than DRAM, so that the CCD is expected to become the less expensive option.
RAM vs. SAM
Here we diverge for a moment to talk about memory naming conventions. It pertains to the discussion in a way that you probably never knew.
Why is RAM called RAM, as in DRAM and SRAM? RAM stands for “Random-Access Memory.” Why do we use that term? Because in the early 1960s and before, certain memories were serially-accessed. These included some very different technologies than are used today, including shift registers and even mercury delay lines, where digital data was converted to sound waves that were then sent down a tube of mercury and picked up at the other end to be turned back into digital bits.
These were Serial-Access Memories, or SAMs. CCDs are Serial-Access Memories.
While SAMs solved a lot of technical problems in their time, they presented challenges. The biggest one is that the program had to wait for the correct data to arrive. Consider iterating on a very short software loop in a SAM that was hundreds of times the length of that software loop. The processor would perform a single iteration, then wait for the code to come back through again to iterate the next time. Needless to say, programmers learned to write code that managed its way around this issue, but it certainly wouldn’t have been easy code to read!
Today’s processors all have internal caches that fetch data in larger chunks, typically eight addresses at a time. This is a much better fit for a SAM than in the 1970s when caches were seldom used. That short software loop is likely to be run out of the cache without requiring repeated accesses to either a DRAM or a SAM, and so it’s not quite as clumsy to use a SAM today as it was back then. CCDs now make more sense than they did in those days.
Coming Back to 2026
So why does this matter today? It’s because the introduction of 3D NAND’s unique “Punch & Plug” construction a CCD’s 3-transistor or 4-transistor cell can be built vertically using transistors stacked one above the other to make memories that are denser, and that should be far cheaper, than DRAMs. That’s what imec’s researchers hope to develop.
The new CCD is under development using a 3D NAND structure, but since the channel must store a charge, a CCD has different requirements than NAND. The imec researchers have chosen to replace 3D NAND’s standard amorphous silicon channel, the material that fills the Plug, with a IGZO (Indium Gallium Zinc Oxide) to create a channel with the right properties.
Although they haven’t yet produced a 3D part, which I understand is coming soon, imec researchers presented a planar part at the 2024 IEEE IEDM conference that uses the same materials and that performs very well. The imec website has a nicely-illustrated blog post that explains how they hope to use this design as a basis for AI-specific compute-in-memory chips.
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�� CONTENT HASHES:
  SHA-256:  d75f642a9b737501313a5bb072b8f0544bc3fd477bad55ba8a475c71105a3f67
  BLAKE2b:  b4d52ddac244de24de79055c9a3e060c46401110b778393f8fd43a2183f65da8
  MD5:      092dbe1234583eadfad495955ac59ac7

�� TITLE HASHES:
  SHA-256:  1e52970c67ae6ea82f8761d68dd7c1d4f258bbef03016b3fc314ad7bcd8397a5
  BLAKE2b:  67229e006cf28cb691496442a22bbed42500cd029575d72be8560b372a590be2
  MD5:      a094af61d0371139d4d56dc03fbe87a0

�� INTEGRITY HASHES:
  SHA-256:  17da266d96c625fdcaab7b72f898d51ffb741697b3704846be62d64268d2a302
  BLAKE2b:  41fdba7095ca8168beae3ccabd64669e14d0a65f00995fd76a0cf1a627371ce7
  MD5:      880e9e5e7c077aad93947dfdc8e88fe1

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