Risc-V is currently very bad in performance.
Mainly because only the CPU arch is free.
this means that any company can print this CPUs, without needing any architecture engineer.
But a PC is not just a CPU. the chipset needs to deal with XX controllers like sata, nvme, pcie, display IP, USB. and those are not opensource.
Meaning that they cant just download a curated design from github and print them.
And that has been the issue on RISK-V nothing is correctly dimension, and many things that any other system does on the hardware level, risc-V is doing at software level after data entring the cpu at a very badly dimensioned IO.
there is a major issue using open hardware like risc-v
unlike the open software, the users wont be able to know what was implemented on their risc-v chip.
knowing all of this are printed by CPP controlled companies, and none are audited by western entities. it becomes more closed source than real closed source.
Intel and AMD have decades knowing that the links between all cores and the PCIe lanes needs to be X us of latency and Y GB/s. terracore
on Risc-v this is decided by some Chinese company trying to make a CPU.
This means that You are getting a CPU with pentium 133 technology level. and lower instruction set.